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mos integrated circuit m PD78F4225 16/8-bit single-chip microcontrollers description the m PD78F4225 is a product in the m pd784225 subseries in the 78k/iv series. the m PD78F4225 has a flash memory in the place of the internal rom of the m pd784225. data can be written to or erased from the flash memory of the m PD78F4225 with the microcontroller mounted on a printed wiring board. the functions are explained in detail in the following users manuals. be sure to read this manual when designing your system. m pd784225, 784225y subseries users manual - hardware : planned 78k/iv series users manual - instruction : u10905e features ? pin-compatible with mask rom model (except v pp pin) ? flash memory: 128k bytes ? internal ram : 4352 bytes ? same operating voltage as mask rom model: v dd = 1.8 to 5.5 v ordering information part number package m PD78F4225gc-8bt 80-pin plastic qfp (14 14 mm) m PD78F4225gk-be9 80-pin plastic tqfp (fine pitch) (12 12 mm) document no. u12499ej1v0pm00 (1st edition) date published june 1997 n printed in japan the information contained in this document is being issued in advance of the production cycle for the device. the parameters for the device may change before final production or nec corporation, at its own discretion, may withdraw the device prior to its production. 1997 preliminary product information
2 m PD78F4225 78k/iv series product development : under mass production : under development standard models pd784026 m assp models pd784038y m pd784038 m enhanced a/d, 16-bit timer, power management enhanced internal memory capacity, pin-compatible with pd784026 i 2 c bus compatible model pd784225y m pd784225 m 80 pins, rom correction added multi-master i 2 c bus compatible model pd784216y m pd784216 m 100 pins, enhanced i/o and internal memory capacity multi-master i 2 c bus compatible model m pd784218y m pd784218 m enhanced internal memory capacity, rom correction added multi-master i 2 c bus compatible model pd784054 m pd784046 m with 10-bit a/d pd784908 m with iebus tm controller pd78f4943 m for cd-rom, flash memory: 56k bytes pd784915 m with software servo control, analog circuit for vcrs, enhanced timer pd784928y m pd784928 m multi-master i 2 c bus compatible model enhanced function of pd784915 m
3 m PD78F4225 functions item function number of basic instructions 113 (mnemonics) general-purpose register 8 bits 16 registers 8 banks, or 16 bits 8 registers 8 banks (memory mapping) minimum instruction execution ? 160 ns/320 ns/640 ns/1280 ns/2560 ns (main system clock: f xx = 12.5 mhz) time ? 61 m s (subsystem clock: f xt = 32.768 khz) internal flash memory 128 kb memory ram 4352 bytes memory space 1 mb with program and data spaces combined i/o port total 67 cmos input 8 cmos i/o 59 pins with pull-up 57 resistor leds direct 16 drive output real-time output port 4 bits 2, or 8 bits 1 timer/counter 16-bit timer/counter : timer register 1 pulse output capture/compare register 2 ? pwm/ppg output ? square wave output ? one-shot pulse output 8-bit timer/counter 1 : timer register 1 pulse output compare register 1 ? pwm output ? square wave output 8-bit timer/counter 2 : timer register 1 pulse output compare register 1 ? pwm output ? square wave output 8-bit timer/counter 5 : timer register 1 compare register 1 8-bit timer/counter 6 : timer register 1 compare register 1 serial interface uart/ioe (3-wire serial i/o): 2 channels ( on-chip baud rate generator ) csi (3-wire serial i/o): 1 channel a/d converter 8-bit resolution 8 channels d/a converter 8-bit resolution 2 channels clock output selectable from f xx , f xx /2, f xx /2 2 , f xx /2 3 , f xx /2 4 , f xx /2 5 , f xx /2 6 , f xx /2 7 , f xt buzzer output selectable from f xx /2 10 , f xx /2 11 , f xx /2 12 , f xx /2 13 watch timer 1 channel watchdog timer 1 channel standby ? halt/stop/idle mode ? in power-saving mode (with subsystem clock): halt/idle mode interrupt hardware 25 (internal: 18, external: 7) software brk instruction, brkcs instruction, operand error non-maskable internal: 1, external: 1 maskable internal: 17, external: 6 ? 4 programmable priority levels ? 3 service modes: vectored interrupt/macro service/context switching supply voltage v dd = 1.8 to 5.5 v package ? 80-pin plastic qfp (14 14 mm) ? 80-pin plastic tqfp (fine pitch) (12 12 mm) note the pins with ancillary functions are included in the i/o pins. pins with ancillary functions note
4 m PD78F4225 contents 1. differences among models in m pd784225 subseries ............................................... 5 2. pin configuration (top view) ............................................................................................... 6 3. block diagram ......................................................................................................................... 8 4. pin function ............................................................................................................................... 9 4.1 port pins ............................................................................................................................... ................. 9 4.2 pins other than port pins .................................................................................................................. 11 4.3 i/o circuit type of respective pins and recommended connections of unused pins ........... 13 5. internal memory size select register (ims) .............................................................. 16 6. programming flash memory ............................................................................................. 17 6.1 selecting communication mode ........................................................................................................ 17 6.2 flash memory programming function ............................................................................................. 18 6.3 connecting flashpro ii ........................................................................................................................ 18 7. package drawings ................................................................................................................. 20 appendix a. development tools ............................................................................................. 22 appendix b. related documents ............................................................................................ 24
5 m PD78F4225 1. differences among models in m pd784225 subseries the only difference among the m pd784224 and 784225 lies in the internal memory capacity. the m PD78F4225 is provided with a 128-kb flash memory instead of the mask rom of the above models. these differences are summarized in table 1-1. table 1-1. differences among models in m pd784225 subseries part number m pd784224 m pd784225 m PD78F4225 item internal rom 96 kbytes 128 kbytes 128 kbytes (mask rom) (mask rom) (flash memory) internal ram 3584 bytes 4352 bytes internal memory size none provided switching register (ims) v pp pin none provided
6 m PD78F4225 2. pin configuration (top view) ? 80-pin plastic qfp (14 14 mm) m PD78F4225gc-8bt ? 80-pin plastic tqfp (fine pitch) (12 12 mm) m PD78F4225gk-be9 notes 1. directly connect the test/v pp pin to v ss0 in normal operation mode. 2. connect the av ss pin to v ss0 . remark when using in applications where noise from inside the microcomputer has to be reduced, it is recommended to take countermeasures against noise such as supplying power to v dd0 and v dd1 independently, and connecting v ss0 and v ss1 to different ground lines. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 p15/ani5 p16/ani6 p17/ani7 av ss p130/ano0 p131/ano1 av ref1 p70/si2/rxd2 p71/so2/txd2 p72/sck2/asck2 p20/si1/rxd1 p21/so1/txd1 p22/sck1/asck1 p23/pcl p24/buz p25/si0 p26/so0 p27/sck0 p40/ad0 p41/ad1 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 reset p127/rtp7 p126/rtp6 p125/rtp5 p124/rtp4 p123/rtp3 p122/rtp2 p121/rtp1 p120/rtp0 p37/exa p36/ti01 p35/ti00 p34/ti2 p33/ti1 p32/to2 p31/to1 p30/to0 p67/astb p66/wait p65/wr p42/ad2 p43/ad3 p44/ad4 p45/ad5 p46/ad6 p47/ad7 p50/a8 p51/a9 p52/a10 p53/a11 p54/a12 p55/a13 v ss1 p56/a14 p57/a15 p60/a16 p61/a17 p62/a18 p63/a19 p64/rd 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 p14/ani4 p13/ani3 p12/ani2 p11/ani1 p10/ani0 av dd v dd0 xt1 xt2 test/v pp x1 x2 v dd1 v ss0 p05/intp5 p04/intp4 p03/intp3 p02/intp2/nmi p01/intp1 p00/intp0 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
7 m PD78F4225 a8-a19 : address bus ad0-ad7 : address/data bus ani0-ani7 : analog input ano0, ano1 : analog output asck1, asck2 : asynchronous serial clock astb : address strobe av dd : analog power supply av ref1 : analog reference voltage av ss : analog ground buz : buzzer clock exa : external access status output intp0-intp5 : interrupt from peripherals nmi : non-maskable interrupt p00-p05 : port0 p10-p17 : port1 p20-p27 : port2 p30-p37 : port3 p40-p47 : port4 p50-p57 : port5 p60-p67 : port6 p70-p72 : port7 p120-p127 : port12 p130, p131 : port13 pcl : programmable clock rd : read strobe reset : reset rtp0-rtp7 : real-time output port rxd1, rxd2 : receive data sck0-sck2 : serial clock si0-si2 : serial input so0-so2 : serial output test : test ti00, ti01, ti1-ti2 : timer input to0-to2 : timer output txd1, txd2 : transmit data v dd0 , v dd1 : power supply v pp : programming power supply v ss0 , v ss1 : ground wait : wait wr : write strobe x1, x2 : crystal (main system clock) xt1, xt2 : crystal (subsystem clock)
8 m PD78F4225 3. block diagram intp2/nmi intp0, intp1, intp3-intp6 programmable interrupt controller real-time output port timer/counter6 (8 bits) timer/counter5 (8 bits) timer/counter2 (8 bits) timer/counter1 (8 bits) timer/counter (16 bits) watch timer watchdog timer ti00 ti01 to0 ti1 to1 ti2 to2 rtp0-rtp7 clock output control a/d converter av dd av ss pcl buz ani0-ani7 d/a converter ano0 av ss av ref1 ano1 78k/iv cpu core flash memory ram baud-rate generator rxd1/si1 txd1/so1 asck1/sck1 rxd2/si2 txd2/so2 asck2/sck2 si0 so0 sck0 bus i/f uart/ioe1 rd astb wr wait ad0-ad7 a8-a15 a16-a19 port1 p10-p17 port0 p00-p05 port2 p20-p27 port3 p30-p37 port4 p40-p47 port5 p50-p57 port6 p60-p67 port7 p70-p72 port12 p120-p127 port13 p130,p131 buzzer output system control reset xt2 xt1 x2 x1 v ss0 , v ss1 v dd0 , v dd1 test/v pp clocked serial interface baud-rate generator uart/ioe2 exa
9 m PD78F4225 4. pin function 4.1 port pins (1/2) pin name i/o alternate function function p00 i/o intp0 p01 intp1 p02 intp2/nmi p03 intp3 p04 intp4 p05 intp5 p10-p17 input ani0-ani7 p20 i/o rxd1/si1 p21 txd1/so1 p22 asck1/sck1 p23 pcl p24 buz p25 si0 p26 so0 p27 sck0 p30 i/o to0 p31 to1 p32 to2 p33 ti1 p34 ti2 p35 ti00 p36 ti01 p37 exa p40-p47 i/o ad0-ad7 port 4 (p4): ? 8-bit i/o port ? can be set in input or output mode bit-wise. ? all pins set in input mode can be connected to internal pull-up resistors in software. ? can drive leds. p50-p57 i/o a8-a15 port 5 (p5): ? 8-bit i/o port ? can be set in input or output mode bit-wise. ? all pins set in input mode can be connected to internal pull-up resistors in software. ? can drive leds. port 1 (p1): ? 8-bit input port port 0 (p0): ? 6-bit i/o port ? can be set in input or output mode bit-wise. ? pins set in input mode can be connected to internal pull-up resistors in software bit-wise. port 2 (p2): ? 8-bit i/o port ? can be set in input or output mode bit-wise. ? pins set in input mode can be connected to internal pull-up resistors in software bit-wise. port 3 (p3): ? 8-bit i/o port ? can be set in input or output mode bit-wise. ? pins set in input mode can be connected to internal pull-up resistors in software bit-wise.
10 m PD78F4225 4.1 port pins (2/2) pin name i/o alternate function function p60 i/o a16 p61 a17 p62 a18 p64 rd p65 wr p66 wait p67 astb p70 i/o rxd2/si2 p71 txd2/so2 p72 asck2/sck2 p120-p127 i/o rtp0-rtp7 port 12 (p12): ? 8-bit i/o port ? can be set in input or output mode bit-wise. ? pins set in input mode can be connected to internal pull-up resistor in software bit-wise. p130, p131 i/o ano0, ano1 port 13 (p13): ? 2-bit i/o port ? can be set in input or output mode bit-wise. port 6 (p6): ? 8-bit i/o port ? can be set in input or output mode bit-wise. ? all pins set in input mode can be connected to internal pull-up resistors in software. port 7 (p7): ? 3-bit i/o port ? can be set in input or output mode bit-wise. ? pins set in input mode can be connected to internal pull-up resistor in software bit-wise.
11 m PD78F4225 4.2 pins other than port pins (1/2) pin name i/o alternate function function ti00 input p35 external count clock input to 16-bit timer register ti01 p36 capture trigger signal input to capture/compare register 00 ti1 p33 external count clock input to 8-bit timer register 1 ti2 p34 external count clock input to 8-bit timer register 2 to0 output p30 16-bit timer output (shared by 14-bit pwm output) to1 p31 8-bit timer output (shared by 8-bit pwm output) to2 p32 rxd1 input p20/si1 serial data input (uart1) rxd2 p70/si2 serial data input (uart2) txd1 output p21/so1 serial data output (uart1) txd2 p71/so2 serial data output (uart2) asck1 intput p22/sck1 baud rate clock input (uart1) asck2 p72/sck2 baud rate clock input (uart2) si0 input p25 serial data input (3-wire serial clock i/o0) si1 p20/rxd1 serial data input (3-wire serial clock i/o1) si2 p70/rxd2 serial data input (3-wire serial clock i/o2) so0 output p26 serial data output (3-wire serial i/o0) so1 p21/txd1 serial data output (3-wire serial i/o1) so2 p71/txd2 serial data output (3-wire serial i/o2) sck0 i/o p27 serial clock input/output (3-wire serial i/o0) sck1 p22/asck1 serial clock input/output (3-wire serial i/o1) sck2 p72/asck2 serial clock input/output (3-wire serial i/o2) nmi input p02/intp2 non-maskable interrupt request input intp0 p00 external interrupt request input intp1 p01 intp2 p02/nmi intp3 p03 intp4 p04 intp5 p05 pcl output p23 clock output (for trimming main system clock and subsystem clock) buz output p24 buzzer output rtp0-rtp7 output p120-p127 real-time output port that outputs data in synchronization with trigger ad0-ad7 i/o p40-p47 low-order address/data bus when external memory is connected a8-a15 output p50-p57 middle-order address bus when external memory is connected a16-a19 p60-p63 high-order address bus when external memory is connected rd output p64 strobe signal output for read operation of external memory wr p65 strobe signal output for write operation of external memory wait input p66 to insert wait state(s) when external memory is accessed
12 m PD78F4225 4.2 pins other than port pins (2/2) pin name i/o alternate function function astb output p67 strobe output to externally latch address information output to ports 4 through 6 to access external memory exa output p37 external access status output reset input system reset input x1 input to connect main system clock oscillation crystal x2 xt1 input to connect subsystem clock oscillation crystal xt2 ani0-ani7 input p10-p17 analog voltage input for a/d converter ano0, ano1 output p130, p131 analog voltage output for d/a converter av ref1 to apply reference voltage for d/a converter av dd positive power supply for a/d converter. connected to v dd0 . av ss gnd for a/d converter and d/a converter. connected to v ss0 . v dd0 positive power supply for port block v ss0 gnd potential for port block v dd1 positive power supply (except port block) v ss1 gnd potential (except port block) test v pp directly connect this pin to v ss (this pin is for ic test). v pp test sets flash memory programming mode. to apply a high voltage when program is written or verified.
13 m PD78F4225 4.3 i/o circuit type of respective pins and recommended connections of unused pins table 4-1 shows symbols indicating the i/o circuit types of the respective pins and the recommended connection of unused pins. for the circuit diagram of each type of i/o circuit, refer to figure 4-1 . table 4-1. i/o circuit type of respective pins and recommended connections of unused pins (1/2) pin name i/o circuit type i/o recommended connections of unused pins p00/intp0 8-c i/o input : individually connected to v ss0 via resistor p01/intp1 output: open p02/intp2/nmi p03/intp3-p05/intp5 p10/ani0-p17/ani7 9 input connected to v ss0 or v dd0 p20/rxd1/si1 10-b i/o input : individually connected to v ss0 via resistor p21/txd1/so1 output: open p22/asck1/sck1 p23/pcl p24/buz p25/si0 p26/so0 p27/sck0 p30/to0-p32/to2 8-c p33/ti1, p34/ti2 p35/ti00, p36/ti01 p37/exa p40/ad0-p47/ad7 5-h p50/a8-p57/a15 p60/a16-p63/a19 p64/rd p65/wr p66/wait p67/astb p70/rxd2/si2 8-c p71/txd2/so2 p72/asck2/sck2 p120/rtp0-p127/rtp7 p130/ano0, p131/ano1 12-c
14 m PD78F4225 table 4-1. i/o circuit type of respective pins and recommended connections of unused pins (2/2) pin name i/o circuit type i/o recommended connections of unused pins reset 2 input xt1 16 connected to v ss0 xt2 open av ref1 connected to v dd0 av dd av ss connected to v ss0 test/v pp directly connected to v ss0 remark because the circuit type numbers are standardized among the 78k series products, they are not sequential in some models (i.e., some circuits are not provided).
15 m PD78F4225 figure 4-1. types of pin i/o circuits type 2 in schmitt trigger input with hysteresis characteristics type 5-h pull-up enable data output disable input enable v dd0 p-ch v dd0 p-ch in/out n-ch type 8-c pull-up enable data output disable v dd0 p-ch v dd0 p-ch in/out n-ch type 9 pull-up enable data open drain output disable v dd0 p-ch v dd0 p-ch in/out n-ch type 10-b type 12-c pull-up enable data output disable input enable analog output voltage v dd0 p-ch v dd0 p-ch in/out n-ch p-ch n-ch type 16 feedback cut-off p-ch xt1 xt2 in comparator + v ref (threshold voltage) p-ch n-ch input enable v ss0 v ss0 v ss0 v ss0 v ss0
16 m PD78F4225 5. internal memory size select register (ims) the ims is a register that prevents in software a part of the internal memory from being used. by using this register, the memory of the m PD78F4225 can be mapped in the same manner as a mask rom model with different internal memory (rom and ram) capacity. this register is set by using an 8-bit memory manipulation instruction. its value is set to ffh by reset input. figure 5-1. format of internal memory size select register (ims) caution ims is not provided on the mask rom models ( m pd784224 and 784225). the value to be set to the ims to map the memory of the m PD78F4225 in the same manner as the mask rom model is shown in table 5-1. table 5-1. set value of internal memory size select register (ims) mask rom model set value of ims m pd784225 eeh m pd784226 ffh 1 1 rom1 rom0 1 1 ram1 ram0 76543210 rom1 0 0 1 1 rom0 0 1 0 1 selects internal rom capacity 48k bytes 64k bytes 96k bytes 128k bytes ram1 0 0 1 1 ram0 0 1 0 1 selects peripheral ram capacity 1536 bytes 2304 bytes 3072 bytes 3840 bytes address: 0fffch ims at reset: ffh w
17 m PD78F4225 6. programming flash memory the flash memory can be written with the m PD78F4225 mounted on the target board (on-board). to do so, connect a dedicated flash writer (flashpro ii) to the host machine and target system. remark flashpro ii is a product of naito densei machida mfg. co., ltd. 6.1 selecting communication mode to write the flash memory, use flashpro ii and serial communication. select a serial communication mode from those listed in table 6-1 in the format shown in figure 6-1. each communication mode is selected by the number of v pp pulses shown in table 6-1. table 6-1. communication modes communication mode number of channels pins used number of v pp pulses 3-wire serial i/o 3 sck0/p27 0 so0/p26 si0/p25 sck1/asck1/p22 1 so1/txd1/p21 si1/rxd1/p20 sck2/asck2/p72 2 so2/txd2/p71 si2/rxd2/p70 uart 2 txd1/so1/p21 8 rxd1/si1/p20 txd2/so2/p71 9 rxd2/si2/p70 psendo-3-wire serial 1 p32/to2 12 i/o note (serial clock i/o) p31/to1 (serial data output) p30/to0 (serial data output) note performs serial transfer by controlling port by software. caution be sure to select a communication mode with the number of v pp pulses shown in table 6-1. figure 6-1. communication mode selecting format 12 n 10 v v dd v ss v pp v dd v ss reset
18 m PD78F4225 6.2 flash memory programming function the flash memory is written by transferring or receiving commands and data in a selected communication mode. the major functions of flush memory programming are listed in table 6-2. table 6-2. major functions of flash memory programming function description batch erasure erases all contents of memory. block erasure erases contents of specified memory block. batch blank check checks erased status of entire memory. block blank check checks erased status of specified block data write writes flash memory based on write start address and number of data to be written (in bytes). batch verify compares all contents of memory with input data. block verify compares contents of specified memory block with input data. 6.3 connecting flashpro ii the flashpro ii and m PD78F4225 are connected differently depending on the selected communication mode. figures 6-2 through 6-5 show the connections in the respective communication modes. figure 6-2. connection of flashpro ii in 3-wire serial i/o mode (when using 3-wire serial i/o 0) flashpro ii PD78F4225 m v pp n note v dd v ss reset sck so si v pp v dd0 , v dd1 v ss0 , v ss1 reset sck0 si0 so0 note n = 1 , 2
19 m PD78F4225 figure 6-3. connection of flashpro ii in uart mode (when using uart1) figure 6-4. connection of flashpro ii in pseudo-3-wire serial i/o mode flashpro ii PD78F4225 m v pp n note v dd v ss reset so si v pp v dd0 , v dd1 v ss0 , v ss1 reset r x d1 note n = 1 , 2 t x d1 flashpro ii PD78F4225 m v pp n note v dd v ss reset sck so si v pp v dd0 , v dd1 v ss0 , v ss1 reset p32 (serial clock) p30 (serial input) p31 (serial output) note n = 1, 2
20 m PD78F4225 7. package drawings 80 pin plastic qfp (14 14) item millimeters inches note each lead centerline is located within 0.13 mm (0.005 inch) of its true position (t.p.) at maximum material condition. p80gc-65-8bt f 0.825 0.032 b 14.00?.20 0.551 +0.009 ?.008 s 1.70 max. 0.067 max. m 0.17 0.007 +0.001 ?.003 +0.03 ?.07 +0.009 ?.008 c 14.00?.20 0.551 +0.009 ?.008 a 17.20?.20 0.677?.008 g 0.825 0.032 h 0.32?.06 0.013 +0.002 ?.003 i 0.13 0.005 j 0.65 (t.p.) 0.026 (t.p.) k 1.60?.20 0.063?.008 l 0.80?.20 0.031 +0.009 ?.008 n 0.10 0.004 p 1.40?.10 0.055?.004 q 0.125?.075 0.005?.003 r3 3 +7 ? +7 ? d 17.20?.20 0.677?.008 41 60 40 61 21 80 20 1 m s q r k m l a b c d j h i f g p n detail of lead end
21 m PD78F4225 80 pin plastic tqfp (fine pitch) ( 12) item millimeters inches i j 0.5 (t.p.) 0.10 0.004 0.020 (t.p.) a note each lead centerline is located within 0.10 mm (0.004 inch) of its true position (t.p.) at maximum material condition. s a 14.0?.2 0.551 +0.009 ?.008 b 12.0?.2 0.472 +0.009 ?.008 c 12.0?.2 0.472 +0.009 ?.008 d 14.0?.2 0.551 +0.009 ?.008 f g 1.25 1.25 0.049 0.049 h 0.22 0.009?.002 p80gk-50-be9-4 s 1.27 max. 0.050 max. k 1.0?.2 0.039 +0.009 ?.008 l 0.5?.2 0.020 +0.008 ?.009 m 0.145 0.006?.002 n 0.10 0.004 p 1.05 0.041 q 0.05?.05 0.002?.002 r 55 55 +0.05 ?.04 +0.055 ?.045 b c d j h i g f p n l k m q r detail of lead end m 61 60 41 40 21 20 1 80
22 m PD78F4225 appendix a. development tools the following development tools are available for supporting development of a system using the m PD78F4225. language processor software ra78k4 note 1 assembler package common to 78k/iv series cc78k4 note 1 c compiler package common to 78k/iv series cc78k4-l note 1 c compiler library source file common to 78k/iv series flash memory writing tool flashpro ii dedicated flash writer. flashpro is the product of naito densei machida mfg. co., ltd. product name pending adapter for flash memory writing. debugging tool ie-784000-r in-circuit emulator common to 78k/iv series ie-784000-r-bk break board common to 78k/iv series ie-784218-r-em1 emulation board for evaluation of m pd784225 subseries ie-784000-r-em ie-70000-98-if-b interface adapter when pc-9800 series (except notebook type) is used as host machine ie-70000-98n-if interface adapter and cable when notebook type pc-9800 series is used as host machine ie-70000-pc-if-b interface adapter when ibm pc/at tm is used as host machine ie-78000-r-sv3 interface adapter and cable when ews is used as host machine product name pending emulation probe common to m pd784225 subseries sm78k4 note 2 system simulator common to 78k/iv series id78k4 note 2 integrated debugger for ie-784000-r df784225 (pending) note 3 device file for m pd784225 subseries real-time os rx78k/iv note 3 real-time os for 78k/iv series mx78k4 note 4 os for 78k/iv series remark ra78k4, cc78k4, sm78k4, and id78k4 are used in combination with df784225.
23 m PD78F4225 notes 1. ? pc-9800 series (ms-dos tm ) based ? ibm pc/at and compatible machine (pc dos tm , windows tm , ms-dos, ibm dos tm ) based ? hp9000 series 700 tm (hp-ux tm ) based ? sparcstation tm (sunos tm ) based ? news tm (news-os tm ) based 2. ? pc-9800 series (ms-dos+windows) based ? ibm pc/at and compatible machine (pc dos, windows, ms-dos, ibm dos) based ? hp9000 series 700 (hp-ux) based ? sparcstation (sunos) based 3. ? pc-9800 series (ms-dos) based ? ibm pc/at and compatible machine (pc dos, windows, ms-dos, ibm dos) based ? hp9000 series 700 (hp-ux) based ? sparcstation (sunos) based 4. ? pc-9800 series (ms-dos) based ? imb pc/at and compatible machine (pc dos, windows, ms-dos, ibm dos) based
24 m PD78F4225 appendix b. related documents documents related to device document name document no. japanese english m pd784224, 784225 preliminary product information u12498j planned m PD78F4225 preliminary product information u12499j this document m pd784225, 784225y subseries users manual - hardware planned planned m pd784225 subseries special function register table planned C 78k/iv series users manual - instruction u10905j u10905e 78k/iv series instruction table u10594j C 78k/iv series instruction set u10595j C 78k/iv series application note - software basics u10095j C documents related to development tools (users manuals) document name document no. japanese english ra78k4 assembler package operation u11334j u11334e language u11162j C ra78k series structured assembler preprocessor eeu-817 eeu-1402 cc78k4 series operation eeu-960 C language eeu-961 C cc78k series library source file u12322j C ie-784000-r eeu-5004 eeu-1534 ie-784218-r-em1 u12155j u12155e sm78k4 system simulator - windows based reference u10093j u10093e sm78k series system simulator external component u10092j u10092e user open interface specification id78k4 integrated debugger - windows based reference u10440j u10440e id78k4 integrated debugger - hp9000 series reference u11960j planned (hp-ux based) caution the contents of the above related documents are subject to change without notice. be sure to use the latest edition of a document for designing.
25 m PD78F4225 documents related to embedded software (users manual) document name document no. japanese english 78k/iv series real-time os fundamental u10603j u10603e installation u10604j u10604e debugger u10364j C 78k/iv series os mx78k4 fundamental u11779j C other documents document name document no. japanese english ic package manual c10943x semiconductor device mounting technology manual c10535j c10535e quality grades on nec semiconductor devices c11531j c11531e nec semiconductor device reliability/quality control system c10983j c10983e electrostatic discharge (esd) test mem-539 C guide to quality assurance for semiconductor devices c11893j mei-1202 guide to microcomputer-related products by third parties u11416j C caution the contents of the above related documents are subject to change without notice. be sure to use the latest edition of a document for designing.
26 m PD78F4225 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos device behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. produc- tion process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed imme- diately after power-on for devices having reset function.
27 m PD78F4225 nec electronics inc. (u.s.) santa clara, california tel: 800-366-9782 fax: 800-729-9288 nec electronics (germany) gmbh duesseldorf, germany tel: 0211-65 03 02 fax: 0211-65 03 490 nec electronics (uk) ltd. milton keynes, uk tel: 01908-691-133 fax: 01908-670-290 nec electronics italiana s.r.1. milano, italy tel: 02-66 75 41 fax: 02-66 75 42 99 nec electronics hong kong ltd. hong kong tel: 2886-9318 fax: 2886-9022/9044 nec electronics hong kong ltd. seoul branch seoul, korea tel: 02-528-0303 fax: 02-528-4411 nec electronics singapore pte. ltd. united square, singapore 1130 tel: 253-8311 fax: 250-3583 nec electronics taiwan ltd. taipei, taiwan tel: 02-719-2377 fax: 02-719-5951 nec do brasil s.a. sao paulo-sp, brasil tel: 011-889-1680 fax: 011-889-1689 nec electronics (germany) gmbh benelux office eindhoven, the netherlands tel: 040-2445845 fax: 040-2444580 nec electronics (france) s.a. velizy-villacoublay, france tel: 01-30-67 58 00 fax: 01-30-67 58 99 nec electronics (france) s.a. spain office madrid, spain tel: 01-504-2787 fax: 01-504-2860 nec electronics (germany) gmbh scandinavia office taeby, sweden tel: 08-63 80 820 fax: 08-63 80 388 regional information some information contained in this document may vary from country to country. before using any nec product in your application, please contact the nec office in your country to obtain a list of authorized representatives and distributors. they will verify: ? device availability ? ordering information ? product release schedule ? availability of related technical literature ? development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, ac supply voltages, and so forth) ? network requirements in addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country. j96. 8
m PD78F4225 the related documents indicated in this publication may include preliminary versions. however, preliminary versions are not marked as such. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. anti-radioactive design is not implemented in this product. m4 96.5 iebus is a trademark of nec corp. ms-dos and windows are either registered trademarks or trademarks of microsoft corporation in the united states and/or other countries. ibm dos, pc/at, and pc dos are trademarks of ibm corp. hp9000 series 700 and hp-ux are trademarks of hewlett-packard co. sparcstation is a trademark of sparc international, inc. sunos is a trademark of sun microsystems, inc. news and news-os are trademarks of sony corp.

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